The present disclosure relates to a method for producing semiconductor components, and a semiconductor component obtainable by such a method.
In consumer electronics (CE), microelectronic components (integrated circuits; IC) for the first-level package are generally arranged alongside one another or one above another on a leadframe (quad flat pack no lead; QFN) or laminate substrate (leadless grid array; LGA or ball grid array; BGA) and contact-connected by means of wire bonding or flip-chip techniques. After chip mounting, the leadframe or the laminate substrate is encapsulated with molding compound by injection molding and singulated by means of sawing. These arrangements are soldered onto the second-level printed circuit board in a reflow soldering method.
The so-called “leadless” housings, such as e.g. LGA or QFN, are increasingly superseding the conventional housings having pins, such as small outline integrated circuit (SOIC) or plastic leaded chip carrier (PLCC).
The LGA technique is a serial packaging process comprising die attach, wire bonding and molding, also called transfer molding. Moreover, a comparatively large amount of space is required in the package for the wire bonding connections. In the course of progressive miniaturization, new packaging approaches are being pursued for applications appertaining to microelectronics. In so-called “embedded wafer level ball grid array” methods, the chips, in a “pick and place” process, are placed with the active surface downward onto a carrier provided with a two-sided adhesive film, and are subsequently overmolded. This gives rise to a so-called composite wafer or reconfigured wafer (reconstituted wafer) in the shape of a plastic wafer, preferably in wafer form, in which the chips are embedded. This plastic wafer is then removed from the carrier, as a result of which connections of the chips are exposed. A redistribution wiring can then be carried out as a result. The conventional thin-film technologies and materials are used for the redistribution wiring. The connection pads, also called connection contacts, of the composite wafer are subsequently provided with solder bumps. The components are singulated from the composite wafer by means of sawing.
DE 10 2007 020 656 A1 discloses a workpiece comprising semiconductor chips and a method for producing such a workpiece. The production method comprises the steps of providing at least two semiconductor chips having a first main surface and a second main surface, positioning the semiconductor chips with their first main surfaces on the top side of a carrier plate, applying an electrically conductive layer to regions of the second main surfaces, and applying a potting compound to the electrically conductive layer.